Prof. Charalampos (Babis) Papamanthou
Email: cpap at umd.edu
Office: 3409 A.V. Williams Building
Office hours: Tuesday 5pm-6pm
The course covers the design and analysis of combinational and synchronous sequential systems comprising digital logic gates and flip-flop memory devices, underlying tools such as switching and Boolean algebras and Karnaugh map simplification of gate networks, design and use of decoders, multiplexers, encoders, adders, registers, counters, sequence recognizers, programmable logic arrays (PLAs), read-only memories (ROMS, PROMS), and similar devices, arbitrary radix conversion.
- Class meets Tuesdays and Thursdays from 3.30pm to 4.45pm in KEB 1110.
- Recitations run every Monday. First recitation is on Monday, February 2nd. For more specific information about recitations, read here carefully.
- Homeworks will be published on this webpage. All solutions must be submitted on paper during your assigned recitation. Grades will be posted on Canvas.
- For all course-related information, read here carefully.
- For UTFs contact information and office hours, read here.
- Main textbook: Digital Design by Mano and Ciletti.
- Additional textbook (not required): Digital Principles and Design by Givone.